1. Field of the Invention
The present invention relates to a display device and, in particular, relates to a display device which permits a highly fine display and a high frequency drive.
2. Conventional Art
FIG. 2 is a diagram showing a common structure of conventional display devices. As shown in FIG. 2, the conventional display devices such as a liquid crystal (herein below will be indicated as LC) display device and a plasma display panel include a display module 21 provided with a display panel 26 in which pixels of n0l pieces in line direction and of n0r pieces in row direction are arranged in a matrix shape, a display control unit 22 which controls the display module 21 and a picture image signal generation unit 24 which generates picture image signals.
When displaying picture images on the display panel 26 at a drive frequency of fH, n0l×n0r pieces of picture image signals have to be sent to the display module 21 for every cycle of 1/fH, therefore, signal clock frequency fS for sending the picture image signals from the display control unit 22 to the display module 21 is defined by the following equation (1). Wherein, such as a fly-back time is neglected.fS=n0l×n0r×fH  (1)
Since the signal clock frequency is proportional to the number of pixels and the drive frequency, the signal clock frequency increases depending on an increase of pixel number due to highly fine display requirement and due to a high speed drive of the display device.
Now, writing of data signals will be explained with reference to an active matrix type LC display device as an example.
FIG. 3 is a diagram showing a structure of the system and a structure within a display panel in a conventional display device. As shown in FIG. 3, the conventional active matrix type LC display device includes a display panel 36 in which pixels 48 are arranged in a matrix shape, a display module 31 provided with a signal driver 37, a scan driver 38 and a common electrode driver 39, a display control unit 32 which controls the display module 31 and a picture image signal generation unit 34 which generates picture image signals.
To the signal driver 37 signal lines 42 are connected, to the scan driver 38 scan lines 41a, 41b, 41c, 41d, . . . are connected and to the common electrode driver 39 common electrode lines 43 are connected. Each of the pixels 48 is provided with a thin film transistor (TFT) 47, a capacitance element 45, and a signal electrode (not shown) and an opposing electrode (not shown) for applying a voltage to an LC element 46, the signal electrode is connected to one of the signal lines 42 via the concerned TFT 47 and the opposing electrode is connected to one of the common electrode lines 43.
A driving method of the LC elements 46 through voltage application is performed by sequential line scanning which will be explained hereinbelow. An address signal is sequentially applied by the scan driver 38 to the scan lines 41a, 41b, 41c, 41d, . . . to scan the same. All of the TFTs 47 for one line which are connected to one of the scan lines applied of the address signal are turned ON and potential differences between potentials applied to the signal lines by the signal driver 37 and the potential applied to the common electrode line by the common electrode driver 39 are applied to the respective LC elements 46 and capacitance elements 45.
When driving the display panel 36 having n0l pieces of scan lines, in that n0l pieces of pixels in the line direction through a sequential line scanning at the drive frequency of fH, all of the scan lines have to be scanned within a cycle of 1/fH, therefore, time span when the address signal is applied to one scan line, in that the time tS allowed for writing a data signal is expressed in the following equation (2). Wherein the fly-back time is likely neglected.tS=1/fH×n0l  (2)
Therefore, the time for writing data signal is anti-proportional to the number of scan lines and the drive frequency. Namely, the time for writing data signal decreases depending on the increase of the scan line number due to a highly fine display requirement and due to a high speed drive of the display device, and a problem of shortage of time for writing signal data is likely to arise.
As has been explained above, in the conventional display devices, the signal clock frequency increases depending on the increase of the pixel number in the display module and the increase of the drive frequency. For this reason, the power consumption of the display devices increases as well as ICs which permit a high speed operation are required.
Further, in the display devices which make use of the line sequential scanning drive, the time when one line is selected decreases depending on the increase of the pixel number in the line direction and the increase of the drive frequency. As a result, the time for writing signals is decreased.
Still further, a ratio of an area associating with wirings with respect to an area for the pixels increases depending on the increase of the highly fine display requirement, resultantly, an opening rate of the display panel reduces.